发明名称 |
Apparatus and method for generating a phase delay |
摘要 |
An apparatus for generating a phase delay is disclosed. The apparatus includes a buffer utilized for buffering an input signal and then outputting an output signal; a digital to analog converter (DAC) utilized for converting a digital value representative of phase delay into a corresponding control voltage and outputting a control voltage; and a variable capacitor that has a capacitance value controlled by the control voltage. By controlling the variable capacitance value, the apparatus for generating a phase delay can adjust the phase delay between the input signal and the output signal.
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申请公布号 |
US7132872(B2) |
申请公布日期 |
2006.11.07 |
申请号 |
US20040710175 |
申请日期 |
2004.06.23 |
申请人 |
REALTEK SEMICONDUCTOR CORP. |
发明人 |
KANG HAN-CHANG;LEE CHAO-CHENG |
分类号 |
H03H11/26;H03H7/18;H03K5/00;H03K5/13;H03M1/06;H04B1/69 |
主分类号 |
H03H11/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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