发明名称 |
GATE STACK AND GATE STACK ETCH SEQUENCE FOR METAL GATE INTEGRATION |
摘要 |
The present invention provides, in one embodiment, a process for fabricating a metal gate stack (200) for a semiconductor device (205). The process includes depositing a metal layer (210) over a gate dielectric layer (215) located over a semiconductor substrate (220). The process further includes forming a polysilicon layer (225) over the metal layer (210) and creating a protective layer (230) over the polysilicon layer (225). The process also includes placing an inorganic anti-reflective coating (235) over the protective layer (230). Other embodiments include a metal gate stack precursor structure and a method of manufacturing an integrated circuit. |
申请公布号 |
WO2005122254(A3) |
申请公布日期 |
2006.09.14 |
申请号 |
WO2005US18118 |
申请日期 |
2005.05.23 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;VISOKAY, MARK, R. |
发明人 |
VISOKAY, MARK, R. |
分类号 |
H01L29/78;H01L21/28;H01L21/3213;H01L21/441;H01L21/467;H01L21/469;H01L21/471;H01L21/4763;H01L23/58 |
主分类号 |
H01L29/78 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|