发明名称 Cache memory, processing unit, data processing system and method for filtering snooped operations
摘要 A cache coherent data processing system includes at least a first cache memory supporting a first processing unit and a second cache memory supporting a second processing unit. The first cache memory includes a cache array and a cache directory of contents of the cache array. In response to the first cache memory detecting on an interconnect a broadcast operation that specifies a request address, the first cache memory determines from the operation a type of the operation and a coherency state associated with the request address. In response to determining the type and the coherency state, the first cache memory filters out the broadcast operation without accessing the cache directory.
申请公布号 US2006179244(A1) 申请公布日期 2006.08.10
申请号 US20050055418 申请日期 2005.02.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 GOODMAN BENJIMAN L.;GUTHRIE GUY L.;STARKE WILLIAM J.;WILLIAMS DEREK E.
分类号 G06F13/28 主分类号 G06F13/28
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