| 摘要 |
A frequency synthesizer device with a fast off-to-lock time to enable intermittent operation and achieve power savings through automatic control of its On/Off sequence. A relatively fast off-to-lock time is achieved by controlling the sequence of how various components of the synthesizer are reactivated. The voltage controlled oscillator is reactivated, at first operating at its previous operating frequency prior to being deactivated. The phase frequency detector is inhibited while its input signals, a reference signal and a feedback signal, are activated. In a channel hopping communication scheme, the phase frequency detector coarsely tunes the synthesizer to its previous operating frequency, and then jumps to its new operating frequency. Another aspect of the invention provides improved channel locking by guaranteeing that the phase of the feedback signal in a phase lock loop initially lags the phase of the reference frequency signal at the phase frequency detector.
|
