发明名称 System, apparatus and method of reducing adverse performance impact due to migration of processes from one CPU to another
摘要 A system, apparatus and method of reducing adverse performance impact due to migration of processes from one processor to another in a multi-processor system are provided. When a process is executing, the number of cycles it takes to fetch each instruction (CPI) of the process is stored. After execution of the process, an average CPI is computed and stored in a storage device that is associated with the process. When a run queue of the multi-processor system is empty, a process may be chosen from the run queue that has the most processes awaiting execution to migrate to the empty run queue. The chosen process is the process that has the highest average number of CPIs.
申请公布号 US2006037017(A1) 申请公布日期 2006.02.16
申请号 US20040916985 申请日期 2004.08.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ACCAPADI JOS M.;BRENNER LARRY B.;DUNSHEA ANDREW;MICHEL DIRK
分类号 G06F9/46 主分类号 G06F9/46
代理机构 代理人
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