发明名称 Architecture and method for testing of an integrated circuit device
摘要 In one embodiment, the present invention provides a platform of hardware and/or software that enables the complete access and reliable testing of multiple integrated circuit (IC) devices within a package. This platform may include a testing component (e.g., test circuits, test pads, shared pads, etc.), one or more probe cards and related hardware, wafer probe programs, load board and related hardware of external test equipment, and software and routines for final test programs.
申请公布号 US2005289428(A1) 申请公布日期 2005.12.29
申请号 US20050207518 申请日期 2005.08.19
申请人 SIDLEY AUSTIN BROWN & WOOD LLP 发明人 ONG ADRIAN E.
分类号 G01R31/28;G01R31/3185;G01R31/319;G06F11/00;(IPC1-7):G01R31/28 主分类号 G01R31/28
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