发明名称 OVERMODULATION PREVENTING CIRCUIT IN PWM MODULATION
摘要 PROBLEM TO BE SOLVED: To provide an overmodulation preventing circuit in a PWM modulation. SOLUTION: The overmodulation preventing circuit 20 includes a maximum modulation factor pulse signal generating means 12 for comparing the level V<SB>B</SB>of the triangular wave 3 of a PWM modulator 1 with a high voltage side voltage level V<SB>H</SB>corresponding to the maximum modulation factor allowed at the high voltage side of a modulation factor 2 by a comparator Comp1, outputting a high voltage side maximum modulation factor pulse signal V<SB>D</SB>synchronized with the triangular wave 3, comparing the level V<SB>B</SB>of the triangular wave 3 with the low voltage side voltage level V<SB>L</SB>corresponding to the maximum modulation factor allowed at the low voltage side of the modulation factor 2 by a comparator Comp2 and outputting the low voltage side maximum modulation factor pulse signal V<SB>E</SB>synchronized with the triangular wave 3; and a maximum modulation factor pulse signal injection means 12 having an AND circuit 13 for outputting a pulse signal V<SB>F</SB>of the AND of a PWM output signal 4 after the PWM modulation and the high voltage side maximum modulation factor pulse signal V<SB>D</SB>and an OR circuit 15 for outputting the pulse signal V<SB>G</SB>of the OR of the pulse signal V<SB>F</SB>and the low voltage side maximum modulation factor pulse signal V<SB>E</SB>as a PWM output signal 14. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005328196(A) 申请公布日期 2005.11.24
申请号 JP20040142781 申请日期 2004.05.12
申请人 VICTOR CO OF JAPAN LTD 发明人 WATANABE KENJI
分类号 H03K7/08;(IPC1-7):H03K7/08 主分类号 H03K7/08
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