发明名称 HIGH SPEED IMAGE COMPRESSION APPARATUS USING LAST NON-ZERO DETECTION CIRCUIT
摘要 Disclosed is a high-speed image compression apparatus using a last non-zero detection circuit. A memory stores data corresponding to a result of a quantization operation that quantizes an input. A last non-zero searcher connected to the memory searches for a last non-zero position while the quantization result data is written to the memory, and outputs last non-zero position data. A VLC (Variable Length Coder) finds a pattern from the quantization result data and the last non-zero position data, searches for a variable length code mapped to the pattern, packs the variable length code in a unit of a word, and outputs a compressed stream. The high-speed image compression apparatus can reduce a variable length coding time and can rapidly operate the overall compression system according to a reduced variable length coding time, thereby increasing a frame rate.
申请公布号 KR20050098197(A) 申请公布日期 2005.10.11
申请号 KR20040023537 申请日期 2004.04.06
申请人 C & S TECHNOLOGY CO., LTD. 发明人 LEE, KI TAIK
分类号 H04N7/24;H03M7/42;H04N7/12;H04N7/26;H04N7/30;H04N7/50;(IPC1-7):H04N7/24 主分类号 H04N7/24
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