发明名称 METHOD AND APPARATUS FOR EVALUATING PATTERN SHAPE OF SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To provide a method of acquiring a part with a small process margin as an workmanship test position in the workmanship test of a semiconductor. <P>SOLUTION: The appearance of a semiconductor wafer is inspected to search for positions of detected defects on layout data, they are grouped based on the similarity of the layout data to extract a layout pattern for detecting the effects at a high frequency, and the existing position of the extracted layout pattern is acquired as a workmanship test position. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005259830(A) 申请公布日期 2005.09.22
申请号 JP20040066545 申请日期 2004.03.10
申请人 HITACHI HIGH-TECHNOLOGIES CORP 发明人 FUKUNISHI MUNENORI;SHIBUYA HISAE;TAKAGI YUJI;SHISHIDO CHIE;MAEDA SHUNJI
分类号 H01L21/66;H01L21/027 主分类号 H01L21/66
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