发明名称 METHOD AND CIRCUIT FOR COMPARING DIGITAL DATA AND DIGITAL SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To compare outputs of a plurality of counters without malfunctioning a count value when the outputs of a plurality of counters operating by different frequencies (asynchronously) are compared. SOLUTION: When a count value a1 of a first counter 10 operating at a clock A with a low frequency is equal to a latch value a2 latched by a clock B with a high frequency in a latch 30, comparators 50, 60 and 70 compare a count value b1 of a second counter 20 operating at the clock B with the high frequency with the count value a1 of the first counter 10 operating at the clock A with the low frequency. The clock can easily be synchronized with the other clock, and the count values can be compared without using the counter counting inverted clocks and the number of times at the time of reading/writing. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005260529(A) 申请公布日期 2005.09.22
申请号 JP20040068537 申请日期 2004.03.11
申请人 FUJI XEROX CO LTD 发明人 TAKENOUCHI OSAMU;INOUE NOBUO;SHIMIZU JUNICHI;KOIZUMI HIROSHI;KAMINARI JUNJI
分类号 H03K21/40;(IPC1-7):H03K21/40 主分类号 H03K21/40
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