发明名称 SIGNAL PROCESSING CIRCUIT
摘要 <p>In a signal processing circuit, data as read is written into a buffer (10). When user block determining means (7) determines that a user block is not a desired one, address pointer generating means (8) causes an address pointer to be kept at its original position in the buffer (10). The user data is overwritten from the beginning of the written link part data, thereby abandoning the written link part data. In this way, when a disc in which writing has performed by packet-write system is read, no unnecessary link part data is stored into the buffer (10). Moreover, there is no need to provide a buffer space for storing link part data, and further there is no probability of storing discontinuous data, which occurs due to data dropout or the like, into the buffer (10). This can reduce load of system control means (11) and shorten the time required for accessing data.</p>
申请公布号 WO2005057576(A1) 申请公布日期 2005.06.23
申请号 WO2004JP18145 申请日期 2004.12.06
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;NAKATA, YASUO;KASHII, NAOYUKI 发明人 NAKATA, YASUO;KASHII, NAOYUKI
分类号 G11B20/10;G11B20/12;(IPC1-7):G11B20/10 主分类号 G11B20/10
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