Pulse width position modulator and clock skew synchronizer

摘要

A pulse width position modulator (PWPM) includes a digital delay circuit that outputs multiple subclocks according to a native pixel clock. The multiple subclocks are each skewed within different time periods of the native pixel clock period. A skew pulse generator receives the multiple subclocks from the digital delay circuit and outputs multiple subpixels according to different logical combinations of the multiple subclocks thereby providing increased subpixel output resolution using the native pixel clock. A clock skew synchronizer aligns the subpixels with a line synchronization signal. The clock skew synchronizer allows lines in a printed image to be aligned with the line synchronization signal within subpixel resolution without using high frequency sampling circuity.