| 摘要 |
A method and circuit increases the capacitance of a digit line coupled to a memory cell capacitor during a memory read operation. The increased capacitance on the active digit line coupled to the memory cell capacitor causes it to respond slower to activation of a negative sense amplifier than a reference digit line that is also coupled to the sense amplifier. As a result, the sense amplifier favors sensing a high voltage from the memory cell thereby decreasing the required refresh rate of the memory cells because memory cell capacitors storing a high voltage tend to discharge faster than memory cell capacitors storing a low voltage.
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