发明名称 Memory access prediction in a data processing apparatus
摘要 The present invention relates to techniques for predicting memory access in a data processing apparatus and particular to a technique for determining whether a data item to be accessed crosses an address boundary and will hence require multiple memory accesses. An earlier indication can be provided that at least two memory accesses may be required to access a data item by performing a prediction based upon one or more operands generated from a memory instruction instead of waiting for a memory access generation stage to generate the memory access. Prediction logic can generate a prediction signal to prevent the memory access generation stage from receiving signals from a preceding pipeline stage while at least two memory accesses are being generated.
申请公布号 US6851033(B2) 申请公布日期 2005.02.01
申请号 US20020260545 申请日期 2002.10.01
申请人 ARM LIMITED 发明人 GRISENTHWAITE RICHARD ROY
分类号 G06F9/312;G06F9/355;G06F9/38;G06F12/00;G06F12/02;(IPC1-7):G06F12/00 主分类号 G06F9/312
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