| 摘要 |
<p>A semiconductor memory wherein a read circuit for a redundant memory is small in size and wherein the redundant memory can be appropriately read for a determined address. A semiconductor memory, which has both ordinary cells and redundant cells, comprises a plurality of redundant memories for storing redundant information related to the redundant cells; a redundant memory selection circuit for selecting, in response to an address, a part of the plurality of redundant memories to enable a reading operation; a redundant information hold circuit for holding the redundant information read from the selected redundant memory; and first and second booster circuits for generating voltages for reading the redundant memories. The first and second booster circuits alternately repeat a boost operation and a reset operation in response to address changes. Even if those address changes successively occur in a short time period, one of the first and second booster circuits generates a reading voltage each time, whereby the redundant information can be appropriately read from the selected redundant memory when the address is eventually determined.</p> |
