发明名称 Integrated memory circuit with redundancy circuit for replacing memory area with address by redundant memory area has deactivation memory element for enabling/inhibiting replacement of memory area
摘要 <p>The circuit has a redundancy circuit for replacing a memory area with an address by a redundant memory area (12) associated with the redundancy circuit, one or more fuse memory elements (1) in which the address of the memory area that is to be replaced can be set up, an activation fuse memory element (13) and a deactivation memory element (21) for enabling or inhibiting replacement of the memory area by the redundant memory area. An independent claim is also included for the following: (a) a method of replacing a memory area with an address by a redundant memory area in an integrated circuit.</p>
申请公布号 DE10318771(A1) 申请公布日期 2004.11.25
申请号 DE2003118771 申请日期 2003.04.25
申请人 INFINEON TECHNOLOGIES AG 发明人 BEER, PETER
分类号 G11C7/00;G11C11/401;G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C7/00
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