| 摘要 |
Firmware has a plurality of interface modules for mutually transferring signals between a CPU (11) and a plurality of mutually different interface units (40, 41), the type of controller (40a, 41a) is identified by an identifying module, and the CPU (11) is operated by using one of the interface modules corresponding to the controller (40a, 41a). Since the assignment of the controllers (40a, 41a) in memory space of the CPU (11) is different in accordance with the types of the interface units (40, 41), the type of the interface unit (40, 41) can be identified by a return value at a time when data is written in a certain region of the memory space, so that the CPU (11) can be operated in accordance with the type of the interface unit (40, 41).
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