发明名称 System and method for controlling multi-bank embedded DRAM
摘要 In a computer or microprocessor-based system having a plurality of resources making memory requests of a plurality of banks of memory, a switch-based interconnect system allows multiple simultaneous connections between resources and memory banks, maximizing memory throughput and bandwidth concurrency. The invention is particularly useful in devices having embedded banks of memory, where there are no external constraints requiring use of a bus architecture, but can be used with discrete devices as well.
申请公布号 US6789155(B2) 申请公布日期 2004.09.07
申请号 US20010942389 申请日期 2001.08.29
申请人 MICRON TECHNOLOGY, INC. 发明人 JEDDELOH JOSEPH
分类号 G06F13/16;(IPC1-7):G06F12/00 主分类号 G06F13/16
代理机构 代理人
主权项
地址