发明名称 Failed cell address programming circuit and method for programming failed cell address
摘要 A semiconductor memory device and a failed cell address programming circuit usable therein. The semiconductor memory device as packaged includes a memory cell array having a plurality of memory cells accessed by an internal address, a plurality of redundant memory cells accessed by a failed cell address of a failed memory cell for repairing a failed memory cell, a comparator for comparing data output from the memory cells during testing the semiconductor memory device as packaged and generating a comparative correspondence signal, a mode setting register for storing an externally applied failed cell address programming control signal in response to a mode control signal, an address generating circuit for generating the internal address by buffering and latching an externally applied address, a failed cell address programming circuit for latching the internal address output from the address generating circuit in response to the failed cell address programming control signal when the comparative accordance signal indicates that a failed memory cell is detected and programming the failed cell address which is an address for accessing the failed memory cell; and a failed cell address decoding circuit for generating a redundant selection signal when the internal address output from the address generating circuit and the failed cell address output from the failed cell address programming correspond.
申请公布号 US6788596(B2) 申请公布日期 2004.09.07
申请号 US20030347181 申请日期 2003.01.21
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 KIM JAE-HOON;SEO DONG-IL;OH HYO-JIN
分类号 G11C29/04;G11C29/00;(IPC1-7):G11C7/00 主分类号 G11C29/04
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