发明名称 |
MEMS wafer level chip scale package |
摘要 |
A method of forming a wafer level chip scale package including forming a trench through the semiconductor wafer at a location between two adjacent to chip portions and forming a backside under bump metallurgy connection to an under bump metallurgy on the front face of the semiconductor wafer for each chip portion.
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申请公布号 |
US2004166662(A1) |
申请公布日期 |
2004.08.26 |
申请号 |
US20030371042 |
申请日期 |
2003.02.21 |
申请人 |
APTOS CORPORATION |
发明人 |
LEI KUO-LUNG |
分类号 |
B81B7/00;H01L21/44;H01L21/50;H01L23/10;H01L23/31;H01L23/485;(IPC1-7):H01L21/44 |
主分类号 |
B81B7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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