发明名称 Analogue to digital converter
摘要 A pipeline/subranging architecture is used to provide a circuit for analog to a digital conversion. A course analog to digital converter, a fine analog to digital to converter, combining logic circuitry and a digital to analog converter are used, together with a voltage to current converter and a current to voltage converter. A residual signal is formed as the difference between the input signal and an output signal of the coarse analog to digital conversion, the latter output signal having been converted to analog form by the analog to digital converter. The residual signal is then scaled appropriately and applied to the fine analog to digital converter. A final output signal is based on the output signals of the coarse digital to analog converter and the fine digital to analog converter.
申请公布号 US6731231(B2) 申请公布日期 2004.05.04
申请号 US20020261843 申请日期 2002.09.30
申请人 KONINKLIJKE PHILIPS ELECTRONICS N.V. 发明人 ROOVERS RAF LODEWIJK JAN;VAN DER PLOEG HENDRIK;HOOGZAAD GIAN
分类号 H03M1/14;H03M1/16;(IPC1-7):H03M1/12 主分类号 H03M1/14
代理机构 代理人
主权项
地址