发明名称 |
Integrated circuit having a reduced spacing between a bus and adjacent circuitry |
摘要 |
An integrated circuit that reduces spacing between circuitry and a bus. In accordance with this invention, the bus is a strip of conductive material in a layer of the integrated circuit. The layer includes at least one slot that removes conductive material from the bus. The removal of the conductive material in the slot allows the space between circuitry adjacent the bus and the bus to be reduced. |
申请公布号 |
US6687880(B2) |
申请公布日期 |
2004.02.03 |
申请号 |
US20020245794 |
申请日期 |
2002.09.16 |
申请人 |
VIRTUAL SILICON TECHNOLOGY, INC. |
发明人 |
RIVERA BILLIE JEAN;WALKER WILLIAM GORDON |
分类号 |
G06F17/50;H01L23/528;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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