发明名称 STRUCTURE AND METHOD FOR AN EMITTER BALLAST RESISTOR IN AN HBT
摘要 <p>According to one exemplary embodiment, a heterojunction bipolar transistor (200) comprises an emitter (216). The heterojunction bipolar transistor (200) further comprises a first emitter cap (218) comprising a first high-doped layer (204), a low-doped layer (206), and a second high-doped layer (208), where the first high-doped layer (204) is situated on the emitter (216), the low-doped layer (206) is situated on the first high-doped layer (204), and the second high-doped layer (208) is situated on the low-doped layer (206). The first high-doped layer (204), the low-doped layer (206), and the second high-doped layer (208) form an emitter ballast resistor. According to this exemplary embodiment, the low-doped layer has a thickness and a dopant concentration level such that the resistance of the low-doped layer (206) is substantially independent of the dopant concentration level, but corresponds to the thickness of the low-doped layer (206).</p>
申请公布号 WO2003085743(P1) 申请公布日期 2003.10.16
申请号 US2003009927 申请日期 2003.04.01
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