| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory which can perform defect analysis without affecting system operation even if a system is being operated while the device is incorporated in a system. SOLUTION: A debug mode control circuit 4C selectively activates a reference voltage generating circuit 1, a data input/output circuit 3, an internal signal monitor circuit 6, and a signal history storing/outputting circuit 7 to attain a debug mode based on voltage applied to a pin NC1 and a pin NC2 being not used by a system. When they are activated into a debug mode, the reference voltage generating circuit 1 supplies a power source to the internal circuit by adjusting internal power source voltage to an external power source voltage level. The data input/output circuit 3 controls driving capability of data output. The internal signal monitor circuit 6 monitors arbitrary internal signals, and the signal history storing/outputting circuit 7 stores history of variation of arbitrary internal signals and outputs them to the debug mode control circuit 4C. COPYRIGHT: (C)2003,JPO
|
