发明名称 METHOD FOR FORMING MULTI-CU INTERCONNECTION
摘要 PURPOSE: A method for forming multi-Cu interconnection is provided to be capable of preventing copper atoms redeposited at the sidewalls of a via hole from diffusing into an interlayer dielectric when carrying out the following cleaning process by previously forming SiF based polymer at the sidewalls of the via hole. CONSTITUTION: After forming the first interlayer dielectric(33) having a lower copper line(32) on a semiconductor substrate(31), a silicon carbide layer(34), the second interlayer dielectric(35), and the first nitride layer(36) are sequentially formed on the resultant structure. After selectively etching the first nitride layer by using a via hole mask, the third interlayer dielectric(38) and the second nitride layer(39) are sequentially formed on the resultant structure. A trench is formed by selectively etching the second nitride layer and the second interlayer dielectric. At this time, a via hole is sequentially formed by etching the second interlayer dielectric through the etched portion of the first nitride layer. At this time, SiF based polymers(43) are formed on both sidewalls of the via hole by reacting etching gas with the silicon carbide layer.
申请公布号 KR20030050591(A) 申请公布日期 2003.06.25
申请号 KR20010081074 申请日期 2001.12.19
申请人 HYNIX SEMICONDUCTOR INC. 发明人 LEE, SEONG GWON
分类号 H01L21/768;(IPC1-7):H01L21/768 主分类号 H01L21/768
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