发明名称 TESTING CIRCUIT AND TESTING METHOD
摘要 PROBLEM TO BE SOLVED: To provide the testing circuit of an oscillation circuit, capable of realizing the measurement of jitter using high accuracy by only a logic circuit. SOLUTION: Circuit configuration is formed by incorporating a Base Delay 6, capable of variably controlling delay quantity and a Adjustable Delay 7 in an LSI and the timing difference between the signal, which is obtained by having the output signal of a VCO 26 equipped with a PLL circuit being the oscillation circuit delayed by one cycle, and the signal of the VCO 26 is detected by the Base Delay 6 and the Adjustable Delay 7 to enable measurement of jitters, immediately after the output of the VCO 26. By detecting the timing difference between the signal, which is obtained by delaying the output signal of the VCO 26 by a half cycle, and the signal of the VCO 26 by the Base Delay 6 and the Adjustable Delay 7, the jitters of the section from the rising of the output signal of the VCO 26 to the falling thereof or the section from the falling of the output signal of the VCO 26 to the rising thereof can be measured. Further, the duty ratio of the output of the VCO 26 can be also calculated, on the basis of the value of the measuring result of jitter, without having to change the circuit configuration.
申请公布号 JP2003121505(A) 申请公布日期 2003.04.23
申请号 JP20010319026 申请日期 2001.10.17
申请人 SHARP CORP 发明人 KANDORI KOICHI
分类号 G01R29/02;G01R31/28;H03L7/095 主分类号 G01R29/02
代理机构 代理人
主权项
地址