发明名称 Method for manufacturing and structure of transistor with low-k spacer
摘要 A method for manufacturing a transistor includes forming a gate dielectric layer adjacent a semiconductor substrate. A gate electrode may be formed covering at least a portion of the gate dielectric layer. First and second doped regions of the semiconductor substrate may be formed proximate the gate electrode and separated by a channel region. First and second spacers may be formed at least partially in contact with the gate electrode. The first and second spacers may each comprise a material having a dielectric coefficient value less than the dielectric coefficient value of silicon dioxide. Third and fourth doped regions of the semiconductor substrate may be formed proximate the first and second spacers, respectively.
申请公布号 US2003038305(A1) 申请公布日期 2003.02.27
申请号 US20020214667 申请日期 2002.08.08
申请人 WASSHUBER CHRISTOPH A. 发明人 WASSHUBER CHRISTOPH A.
分类号 H01L21/336;H01L29/78;(IPC1-7):H01L29/76 主分类号 H01L21/336
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