| 摘要 |
A capacitor multiplier/time constant circuit transforms (by approximately a scaling constant k) a relatively small valued capacitor to a much larger valued capacitor in circuit with a relatively small valued resistor. A first of a pair of terminals across which an impedance having a reactance component containing a desired value of capacitance is to be supplied is coupled through a first, relatively small valued resistor to the inverting input of a high input impedance operational amplifier, the output of which is fed back in common with its inverting input terminal. The first terminal is further coupled through a second resistor having a resistance that is a scaling constant multiple of the resistance of the relatively small valued reference resistor, to the non-inverting input of the operational amplifier and to one end of a small reference capacitor, a second end of which is coupled to the second terminal, and an AC (ground) node. The effective capacitance CIN presented to the capacitor multiplier's terminals is on the order of k times the value C of the reference capacitor.
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