发明名称 Method and apparatus for evaluating an integrated circuit model
摘要 A system and method that enables a user to design and use an Integrated Circuit (IC) simulation model without having access to confidential information contained within the model. In one embodiment the system includes a secure section where confidential simulation model information is contained and accessed. The user does not have access to this secure section. The user is provided access to the system via a user-interaction section, which provides controlled access to the IC model. The user can then establish and initiate simulations of the IC model, selecting test stimulus associated with the cores used within the IC model.
申请公布号 US2003004699(A1) 申请公布日期 2003.01.02
申请号 US20020163192 申请日期 2002.06.04
申请人 CHOI CHARLES Y.;EBERT JEFFREY A.;LEVINTHAL ADAM 发明人 CHOI CHARLES Y.;EBERT JEFFREY A.;LEVINTHAL ADAM
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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