SOIFET AND METHOD THEREFORE

摘要

Epitaxial silicon is grown to form elevated source/drain extensions (74) for transistors on silicon-on-insulator (SOI) substrates (50). An offset liner layer (62) is formed between the gate (58) and the epitaxial silicon (74) to prevent shorting. In one embodiment, the offset liner layer (62) is a nitride and in another embodiment it is an oxide. The resulting structure decreases extension resistance and improves the scalability of SOI transistors by increasing the thickness of silicon underneath the source and drain regions, while keeping the silicon underneath the gate thin. This allows for the reduction in gate length without decreasing the functionality of the transistor.