| 摘要 |
The present invention provides a method of manufacturing a MOS transistor of an embedded memory. The method of the present invention involves first defining a memory array area and a periphery circuit region on the surface of the semiconductor wafer and to deposit a gate oxide layer, an undoped polysilicon layer and a dielectric layer, respectively. Next, the undoped polysilicon layer in the memory array area is implanted to form a doped polysilicon layer followed by the removal of the dielectric layer in the memory array area. Thereafter, a metallic silicide layer and a passivation layer are formed, respectively, on the surface of the semiconductor wafer. The passivation layer, the metallic silicide layer and the doped polysilicon layer are then etched to form a plurality of gates in the memory array area. Next, the passivation layer, the metallic silicide layer and the dielectric layer in the periphery circuit region are removed. Finally, the undoped polysilicon layer is etched to form a plurality of gates in the periphery circuit region, followed by the formation of spacers, sources and drains of each MOS transistors, respectively, in the periphery circuit region. |
