发明名称 |
Integrated circuit pakage substrate integrating with decoupling capacitor |
摘要 |
An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.
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申请公布号 |
US2002024801(A1) |
申请公布日期 |
2002.02.28 |
申请号 |
US20000741610 |
申请日期 |
2000.12.19 |
申请人 |
HUNG CHIH-PIN;CHIANG JUNG-SHENG |
发明人 |
HUNG CHIH-PIN;CHIANG JUNG-SHENG |
分类号 |
H01L23/498;H05K1/16;H05K3/40;(IPC1-7):H05K1/11 |
主分类号 |
H01L23/498 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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