发明名称 |
Semiconductor memory device |
摘要 |
The invention provides SRAMs that can reduce memory cells in size and correct light proximity effect. Gate electrode layers in a first layer, drain-drain connection layers in a second layer, and drain-gate connection layers in a third layer define connection wirings of a flip-flop. A p+ type well contact region is provided for every two of the memory cells arranged in the Y-axis direction.
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申请公布号 |
US2002024856(A1) |
申请公布日期 |
2002.02.28 |
申请号 |
US20010876068 |
申请日期 |
2001.06.08 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
KUMAGAI TAKASHI;TAKEUCHI MASAHIRO;KODAIRA SATORU;NODA TAKAFUMI |
分类号 |
H01L21/3205;G11C11/412;H01L21/8244;H01L23/52;H01L27/11;(IPC1-7):G11C29/00 |
主分类号 |
H01L21/3205 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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