发明名称 METHOD FOR SHALLOW TRENCH ISOLATION USING SILICON LINER
摘要 PURPOSE: A method for a shallow trench isolation using a silicon liner is provided to prevent the generation of moat from a trench by depositing an amorphous silicon layer as a liner layer and oxidizing the amorphous silicon layer. CONSTITUTION: A pad oxide layer and a nitride layer are formed on a silicon substrate(11). The silicon substrate(11) corresponding to an isolation region is exposed by patterning the nitride layer and the pad oxide layer. A trench is formed by etching selectively the exposed silicon substrate(11). A sidewall oxide layer is formed on an inside of the trench. An amorphous silicon for liner is deposited on an upper portion of the sidewall oxide layer. The trench is buried by forming an insulating layer(20) on the whole surface of the silicon substrate(11). The insulating layer(20) is planarized. The nitride layer is removed. The amorphous silicon layer is densified by performing an oxidation process. A word line(22) is formed on the silicon substrate(11).
申请公布号 KR20020003018(A) 申请公布日期 2002.01.10
申请号 KR20000037402 申请日期 2000.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 KIM, SU HO;KWON, O JEONG;LEE, CHANG JIN;SON, HO MIN
分类号 H01L21/76;(IPC1-7):H01L21/76 主分类号 H01L21/76
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