| 摘要 |
PROBLEM TO BE SOLVED: To solve such a problem that in the conventional device the interval between a through-hole in an element formation area and a polysilicon wiring running near the element formation area is made shorter, following high density in semiconductor device such as DRAM, etc., which results in the reduced yield for the semiconductor device. SOLUTION: The position of boundary between an element isolation insulation film 3 and a polysilicon wiring 6 is made lower than the surface of a semiconductor substrate 1, so that an interval between the polysilicon wiring 6 formed on the element isolation insulation film 3 beside an element, and a through-hole 9 formed in the element can be made larger and a reduction in yield due to short circuiting of the wiring in a semiconductor device be improve as a result. |
