发明名称 |
HIGH PERFORMANCE SPECULATIVE MISALIGNED LOAD OPERATIONS |
摘要 |
One aspect of the invention relates to a method for processing load instructions in a superscalar processor having a data cache and a register file. In one embodiment, the method includes the steps of dispatching a misaligned load instruction to access a block of data that is misaligned in the cache; while continuing to dispatch aligned instructions: generating a first access and a final access to the cache in response to the misaligned load instruction; storing data retrieved from the first access until data from the final access is available; reassembling the data from the firs t and final access into the order required by the load instruction; and storing the re-assembled data to the register file. |
申请公布号 |
CA2260308(C) |
申请公布日期 |
2001.10.09 |
申请号 |
CA19992260308 |
申请日期 |
1999.01.25 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
RAY, DAVID SCOTT;TUNG, SHIH-HSIUNG STEPHEN;WILLIAMSON, BARRY DUANE |
分类号 |
G06F12/08;G06F9/312;G06F9/38 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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