| 摘要 |
A semiconductor booster circuit includes: a plurality of stages, each having a first MOS transistor (Q51, Q53, Q55, Q57, Q59), a first capacitor (C51, C53, C55, C57, C59) having one terminal connected to a drain terminal of said first MOS transistor and a second capacitor (C52, C54, C56, C58, C60) having one terminal connected to a gate terminal of said first MOS transistor, said stages being connected in series by connecting the first MOS transistors of said stages in cascade; first clock signal generating means for inputting a first clock signal to the other terminal of said first capacitor of each stage; and second clock signal forming means (BS51, BS52) for inputting a second clock signal having a larger amplitude than a power supply voltage (Vdd) to the other terminal of said second capacitor. <IMAGE> |
