发明名称 LOGICAL INTEGRATED CIRCUIT AND COMPUTER READABLE RECORDING MEDIUM IN WHICH SOURCE OF ITS CPU CORE IS RECORDED
摘要 PROBLEM TO BE SOLVED: To save a space of analysis logic and to dispense with reassembly of a hardware circuit whenever the logic is updated by enabling to construct a simple CPU core with high performance on a logical integrated circuit such as FPGA. SOLUTION: A processing to be performed by a control part is simplified since the control part is made to read an instruction and to directly transmit on/off information of each bit to constitute micro-codes to be included in the instruction to registers 25, 28, 29 and a data memory 8 allocated to each bit through control lines L1 to L5 and to control them. Thus, the simple CPU core is constructed on the logical integrated circuit such as the FPGA since the control part is constituted by simple structure.
申请公布号 JP2001216152(A) 申请公布日期 2001.08.10
申请号 JP20000024826 申请日期 2000.01.28
申请人 ROORAN:KK;DAIHEN CORP 发明人 MOGI KENJI;TANAKA RYOHEI;NAKAO TOSHIMITSU
分类号 G06F9/28;G06F9/30;G06F9/318;G06F9/355;G06F9/38 主分类号 G06F9/28
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