STRUCTURE FOR FORMING INTERMEDIATE GATE TRIM REGION OF SEMICONDUCTOR DUAL FRAME

摘要

PURPOSE: A structure for forming an intermediate gate trim region of a semiconductor dual frame is provided to prevent the generation of burr by forming a punching hole on a connection portion of an intermediate gate portion and forming a punching region to the punching hole. CONSTITUTION: A punching hole(30) is formed on a connection portion(29) of an intermediate gate portion(22). A punching region is formed to the punching hole(30) formed on the connection portion(29) when a process for punching a gate(32) is performed. The generation of burr is prevented from a gate punching process by forming the punching region to the punching hole.