| 摘要 |
PURPOSE: A circuit is provided to increase operation speed at a low voltage by differently setting a precharge voltage of a local bit line and a precharge voltage of a global bit line. CONSTITUTION: The circuit includes a pair of local bit lines(MO,MO'), the first and second cell mat drivers(103,104), the first and second sense amplifier drivers(105,106) and sense amplifiers(107,108). The local bit lines read data of cell mats(101,102) having cell blocks for storing data and transfer the read data to a pair of global bit lines(M1,M1'). The first and second cell mat drivers precharge the local bit lines with a reference voltage(VBLR) in response to a switch signal(LBLPre) before an operation and transfer the data signal of the local bit lines to the global bit lines by a switch(SW). The first and second sense amplifier drivers precharge the global bit lines with voltages(V1,V2) higher than the reference voltage before the operation. The precharge voltage of the sense amplifier driver is higher than the precharge voltage of the cell mat driver. The sense amplifiers amplify the data signal of the global bit lines and transfer to a peripheral circuit.
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