| 摘要 |
PROBLEM TO BE SOLVED: To prevent a temporary voltage drop which is caused locally, in a circuit of a standard cell type semiconductor integrated circuit device. SOLUTION: A power terminal 11 is provided at one end part of a standard cell 10 of the semiconductor integrated circuit device, and a ground terminal 12 is provided at the other end part facing the terminal part. Along the gate length of the cell 10, an N-type diffused layer 15 is formed on the side of the power terminal 11 and a P-type diffused layer 16 is formed on the side of the ground terminal 12 with mutual intervals inbetween. In one region of the N-type diffused layer 15 about a gate electrode 14, an in-cell power line 11a extending from the power terminal 11 is formed. An upper-layer wiring pattern 19, having a via hole 18 interposed with the in-cell power line 11a, is formed covering an in-cell ground line 12a, and consequently a capacity part 20 is formed which has the in-cell ground line 12a as a lower electrode and the upper-layer wiring pattern 19 as an upper electrode.
|
