| 摘要 |
The pixel reading circuit includes a signal acquisition circuit, adapted to send a signal directly on an output bus (18). This includes a number of switch elements controlled by two signals, enabling the charging of two capacitors and provision of a direct output signal on an output data bus. The pixel reading circuit includes a signal acquisition circuit, adapted to send a signal directly on an output bus (18). A signal is sent for each pixel of each column, and represents the potential difference between a reference signal (Vref) and the light level signal (Vsig) of the pixel. A first switch (4) is mounted between the output (A) and a point (B) controlled by an SHR signal, enabling the charging of a capacitor (2) (Cref) mounted between point (B) and earth. A second switch (6) is mounted between (A) and point (C), controlled by an SHS signal, enabling the charging of a floating capacitor (5) (Csig) mounted between point (C) and a point (D). A third switch (15) is mounted between (B) and (C) controlled by a read column selection signal (Xi), between the terminals of the capacitors (2 Cref and 5 Csig). A fourth switch (16) is controlled by the SHS signal, and inserted between the capacitor (5) and earth. A fifth switch (17) is controlled by the read column selection signal (Xi) and is mounted between the floating capacitor and the output signal bus (18). |
