METHOD FOR MANUFACTURING DUAL GATE OF SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for manufacturing a dual gate of a semiconductor device is provided to increase a grain size of a polysilicon layer of a P-type metal oxide semiconductor(PMOS) by doping a phosphorous ion to prevent a boron ion from penetrating in a succeeding process, and to decrease the grain size of a polysilicon layer of an N-type metal oxide semiconductor(NMOS) by doping a phosphorous ion after crystallizing the structure by an annealing process. CONSTITUTION: A method for manufacturing a dual gate of a semiconductor device on a semiconductor substrate(10) comprises the steps of: multi-layering an amorphous silicon layer on the substrate, and forming a first mask of which a portion to be a capacitor is open; injecting a phosphorous ion into the amorphous silicon layer through the open portion of the first mask, to eliminate the firs mask; multi-layering a second mask in a P-type metal oxide semiconductor(PMOS) area of the amorphous silicon layer to open a portion in which a PMOS gate is to be formed, and injecting a phosphorous ion into the amorphous silicon layer through the open portion; eliminating the second mask to stack an insulating oxidation layer(60) on the amorphous silicon layer while crystallizing the amorphous silicon layer; stacking and etching a third mask to expose a polysilicon layer; and stacking a fourth mask to open a portion to be an NMOS gate in an N-type MOS(NMOS) area, and injecting a phosphorous ion to form an NMOS gate, a PMOS gate and a capacitor.