发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To prevent surely malfunction and to improve largely reliability independently of a state of a signal inputted to an external input terminal at the time of applying a power source. SOLUTION: When a power source is applied, a non-active signal is outputted from a reverse RAS buffer circuit 13, a reverse CAS buffer circuit 14, a reverse WE buffer circuit 15, and a reverse OE buffer circuit 16 independently of signal states of a row address strobe signal reverse RAS, a column address strobe signal reverse CAS, a write-enable signal reverse WE, and an output-enable signal reverse OE being control signals externally inputted. In an initial cycle, when the row address strobe signal reverse RAS is transited to perform a first time reverse RAS only refresh, receiving a control signal externally inputted is started.
申请公布号 JP2000276897(A) 申请公布日期 2000.10.06
申请号 JP19990079555 申请日期 1999.03.24
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 ASADA EIJI;KIZAKI SHIGEO;KASAMA YASUHIRO
分类号 G11C11/401;G11C29/00;G11C29/14;H01L27/10;(IPC1-7):G11C29/00 主分类号 G11C11/401
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