发明名称 RAM configurable redundancy
摘要 <p>A circuit and method for replacing a defective memory line with a usable memory line. A test is carried out to locate any defective lines, whether a row line or a column line, within a block of memory. If a defective line is found, the identity of the defective line is stored in software code. The software code is stored in a file or table, or other acceptable location, together with the identification of the memory block which is associated with the test data. When the computer is enabled for operation, the test data is loaded from the file into a register associated with the memory. When the memory is addressed, the register prevents addressing to the defective memory line and replaces it instead with an alternative line in the memory which has been tested as usable for storing and retrieving data. &lt;IMAGE&gt;</p>
申请公布号 EP1014268(A2) 申请公布日期 2000.06.28
申请号 EP19990410183 申请日期 1999.12.22
申请人 TERA COMPUTER COMPANY 发明人 HELLRIEGEL, STEPHEN V.R.;KOPSER, ANDREW S.;HENRY, ROBERT R.
分类号 G11C29/04;G11C29/00;(IPC1-7):G06F11/20 主分类号 G11C29/04
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