发明名称 DISPLAY CONTROLLER
摘要 PROBLEM TO BE SOLVED: To reduce the power consumption of a display controller and to reduce the competition between frame buffer access from a host and the frame buffer access in the display controller. SOLUTION: In this display controller, a comparison/count circuit 9 monitors the data passing through a display FIFO 5 by control of a compression timing circuit 11 in compression/display operation, and judges the continuous of the same data. When the continuous data exist, a compression data write-back circuit 10 forms the compression data to write them in a compression frame 2a of a frame buffer 2. In expansion/display operation, the display FIFO 5 reads out the compression data from the compression frame 2a to expand and output them.
申请公布号 JP2000098993(A) 申请公布日期 2000.04.07
申请号 JP19980270261 申请日期 1998.09.24
申请人 OKI ELECTRIC IND CO LTD 发明人 KOBAYASHI TSUKASA
分类号 G06F5/00;G09G3/20;G09G3/36;G09G5/00;(IPC1-7):G09G5/00 主分类号 G06F5/00
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