METHOD OF FORMING MULTI-LEVEL CELLS IN MEMORY ARRAY AND MOS MEMORY CELL

摘要

PROBLEM TO BE SOLVED: To store many bits per cell in an integrated circuit having asymmetric memory cells. SOLUTION: Asymmetric multi-level memory cells give inhibited source read currents which greatly reduce the cell type misled error possibility, for a memory array having multi-level cells. This method of manufacturing asymmetric multi-level memory cells comprises implanting in the source only, forming a spacer 620 at the drain side of a gate before implanting in a source 515/drain 610, and forming an offset region 630 between the channel and drain. The offset region is not controlled by the gate voltage. The asymmetric multi-level cells of a memory array with cells having a common source shape are read exactly in one direction. The reason for this is that the adjacent cells on word lines have substantially lower source currents than drain currents of the read cells.