发明名称 MICROPROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a microcomputer which can deal with a PCMCIA by inhibiting the start of the next access until a signal sent from a terminal is asserted according to the input value of the signal and a state signal and accordingly inserting a recovery cycle through a bus access end terminal. SOLUTION: A state control part 61 shifts to a prescribed state based on a 'req from CPU' signal 61a, a data complete signal DC, a bus access end signal BEND and the current state, and outputs a state signal 'state'. An output buffer 66 (incl. an access control circuit, an address data control circuit and a data input/output circuit) controls the output of the data which are held by a D flip-flop 65 by means of a data output signal 64c. Under such conditions, a bus access state is shifted and the signal 'state' accordant with the shifted bus access state is outputted. Then the start of the next access is inhibited until a signal sent from a terminal is asserted according to the input value of the signal and the signal 'state'.
申请公布号 JP2000057085(A) 申请公布日期 2000.02.25
申请号 JP19980228260 申请日期 1998.08.12
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKADA YUKARI
分类号 G06F13/28;(IPC1-7):G06F13/28 主分类号 G06F13/28
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