| 摘要 |
<p>The central frequency of a wideband filter (APF) is adjusted in such a way that the phase of the output signal regarding the phase of the input signal differs by 90 degrees. The input and output of the wideband filter (APF) are via voltage comparison units (C1, C2) connected to the exclusive OR (XOR) gate, having its output connected to the input for adjusting the incrementation-decrementation counter (UDC) with the clock signal (CI) as its counter input and whose output is connected to the input of the data register (R), which is actuated by the signal coming from the first voltage comparison unit (C1). The data register (R) output is connected to the control pin for switching resistors connected in series on or off, which form a digitally controlled resistor (1') and whose resistivity forms a 2 based geometrical series, having its first resistor connected to the central frequency adjustment input of the wideband filter (APF), while the last one is connected to the common ground.</p> |
