| 发明名称 |
Method of manufacturing a MOSFET |
| 摘要 |
<p>Silicon germanium (SiGe) as a gate or interconnection covered with low temperature wet oxide: SixG1-xO2. The silicon surface (source and drain) is not oxided.</p> |
| 申请公布号 |
EP0935292(A2) |
申请公布日期 |
1999.08.11 |
| 申请号 |
EP19990107808 |
申请日期 |
1995.05.23 |
| 申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
TSUTSU, HIROSHI |
| 分类号 |
H01L29/78;H01L21/28;H01L21/336;H01L29/49;H01L29/786;(IPC1-7):H01L29/786;H01L29/51;H01L23/532;H01L21/321 |
主分类号 |
H01L29/78 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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